| Pin # |
Signal (active high unless noted) |
comment |
| 1 |
A11 |
| 2 |
A12 |
| 3 |
A13 |
Address bus |
| 4 |
A14 |
| 5 |
A15 |
| 6 |
CLK |
clock, rising edge trig |
| 7 |
D4 |
| 8 |
D3 |
| 9 |
D5 |
Data bus |
| 10 |
D6 |
| 11 |
+5V |
| 12 |
D2 |
| 13 |
D7 |
| 14 |
D0 |
| 15 |
D1 |
| 16 |
INT |
Interupt Request |
| 17 |
NMI |
Non-maskable Interupt Request |
| 18 |
HALT |
Active low |
| 19 |
MREQ |
Memory Request, active low |
| 20 |
IORQ |
I/O Request, active low |
| 21 |
RD |
Read, active low |
| 22 |
WR |
Write, active low |
| 23 |
BUSAK |
Bus Request Acknowloegmnet, active low |
| 24 |
WAIT |
| 25 |
BUSRQ |
Bus Request |
| 26 |
RESET |
| 27 |
MI |
Maskable interupt, active low |
| 28 |
REFSH |
Refresh timing, active low |
| 29 |
GND* |
| 30 |
A0 |
| 31 |
A1 |
| 32 |
A2 |
| 33 |
A3 |
| 34 |
A4 |
| 35 |
A5 |
| 36 |
A6 |
| 37 |
A7 |
| 38 |
A8 |
| 39 |
A9 |
| 40 |
A10 |