40100 32-bit 3-state bidirectional serial-in serial-out shift register with separate shift left and shift right serial in/outputs and both active high and active low clocks. +----------+ |1 +--+ 16| VCC /CLK2 |2 15| CLK1 |3 14| Q31 |4 13| L//R |5 40100 12| Q0 L |6 11| D |7 10| GND |8 9| /LOOP +----------+ [This information is part of the GIICM]