DS1210
Nonvolatile SRAM controller chip.
TOL selects power-fail VCC level, based on 5% tolerance when 0 or
10% tolerance when 1.

      +----------+           +------------+
 VCCo |1  +--+  8| VCC       |/EN|VCC |/Y |
VBAT1 |2   DS   7| VBAT2     |---+----+---|
  TOL |3  1210  6| /Y        | 1 | OK | 1 |
  GND |4        5| /EN       | 0 | OK | 0 |
      +----------+           | X | LO | 1 |
                             +------------+

[This information is part of the GIICM]