8155 2048-bit static MOS RAM with i/o ports and timer register usage 19881022/wj van ganswijk 0 command/status register *command w .......1 define pa0-7 as output/input w ......1. define pb0-7 as output/input w ....00.. define pc0-5, alt1 w ....01.. define pc0-5, alt3 w ....10.. define pc0-5, alt4 w ....11.. define pc0-5, alt2 w ...1.... en/disable port a interrupt w ..1..... en/disable port b interrupt w 00...... nop, do not affect counter operation w 01...... stop, nop if timer has not started; stop counting if the timer is running w 10...... stop after tc, stop immediately after present tc is reached (nop if timer has not started) w 11...... start, load mode and cnt length and start immediately after loading (if timer is not presently running). If timer is running, start the new mode and cnt length immediately after present tc is reached. *status r .......1 port a interrupt request r ......1. port a buffer full/empty (input/output) r .....1.. port a interrupt enable r ....1... port b interrupt request r ...1.... port b buffer full/empty (input/output) r ..1..... port b interrupt enabled r .1...... timer interrupt (this bit is latched high when terminal count is reached, and is reset to low upon reading of the c/s register or starting new count. 1 port a 2 port b 3 port c alt1 alt2 alt3 alt4 rw .......1 input output a intr a intr rw ......1. input output a bf a bf rw .....1.. input output a stb a stb rw ....1... input output output b intr rw ...1.... input output output b bf rw ..1..... input output output b stb rw xx...... reserved 4 count length register, lsb rw xxxxxxxx count b0..b7 5 count length register, msb and mode rw ..xxxxxx count b8..b13 rw 00...... put out low during second half of count rw 01...... square wave, i.e. the period of the square wave equals the count length programmed with automatic reload at terminal count. rw 10...... single pulse upon tc being reached rw 11...... automatic reload, i.e. single pulse everytime tc is reached *end